1. Field of the Invention
The present invention relates to a semiconductor module, a semiconductor device, and a manufacturing method of a semiconductor module. In particular, it relates to a manufacturing method that reduces the ground inductance of a high frequency circuit.
2. Description of the Related Art
Compound semiconductors such as a gallium arsenide (GaAs) and the like have superior characteristics including a favorable high-speed operation capability and a favorable power conversion efficiency as compared to silicon (Si). Development and implementation is progressing regarding a monolithic microwave integrated circuit (MMIC), an integrated high frequency circuit that utilizes such characteristics of compound semiconductors. A power amplifier microwave integrated circuit (MMIC), an integrated high frequency circuit that utilizes such characteristics of compound semiconductors. A power amplifier module is a kind of MMIC that uses, for example, gallium arsenic hetero-junction bipolar transistors (HBT), and is widely used in equipment such as mobile phones. As the size of such equipment is reduced, demand has emerged for reducing the size of built in semiconductor devices therein. MMICs that meet these demands are being fabricated. However, the problem of parasitic impedance in ground wiring and the like may occur in reducing the size of semiconductor devices. In high frequency circuits, the parasitic impedance of wiring connecting the semiconductor device, and in particular ground wiring, affects the high frequency characteristic. For example, as shown in FIG. 1, the connection between a signal pad 112 and a ground pad 111 formed on a semiconductor device, and a signal line 107 and a ground 105, respectively, on a mounting substrate 103 is implemented by bonding wires 118a and 118b. Since the ground connection between the semiconductor device on a semiconductor chip 121 and the mounting substrate 103 is made by the bonding wire 118b, ground inductance increases and the power gain of the power amplifier module deteriorates. In order to solve such problems regarding ground inductance, through-holes formed in the semiconductor substrate are used for the connection between the ground pad formed on a top surface of the semiconductor chip and the ground of the mounting substrate. With this method, after thinning semiconductor substrate, the through-holes are formed so as to pass through the semiconductor substrate from a bottom surface to the top surface, and a gold plating is formed on the entire area of the bottom surface of the semiconductor chip. It is thereby possible to make a ground connection without using wires, and ground inductance is drastically reduced. Nevertheless, this leads to a significant drop in yield since complicated processes are needed on a very thin semiconductor substrate, including a photolithography process on the bottom surface, an etching process to form the through-holes, and a plating process for the bottom surface. To avoid an etching process in forming the through-holes in a semiconductor substrate that already has been thinned, a proposed method includes, first forming through-holes in the top surface of the semiconductor substrate, forming a gold plated layer within each through-hole, polishing the bottom surface of the semiconductor substrate to expose the gold plated layer, and then forming a metal layer on the whole area of the bottom surface. However, with this method as well, the etching process to form the through-holes in the semiconductor substrate is necessary. Also, since process controlling in forming a cross-section of the through-holes appropriate for metallic filling is further required, complexity is not eliminated. Moreover, since individual chips are separated following formation of the metallic layer on the bottom surface of the thin semiconductor substrate, such a method causes yield to drop.
Thus the ground inductance may increase caused by the bonding wire with the earlier mounting configuration of high frequency semiconductor devices such as MMIC. In order to reduce the ground inductance, methods have been proposed to form the through-holes in a thin semiconductor substrate. However, a complicated process forming the through-holes or the like are required, in addition to regular fabrication processes for the semiconductor device.